This is one example of numerous similar errors that says my topology violates the rules. I have port out->port in, consistent data types. This seems to accord with the restrictions and examples in section 4.3.2 Port Connections in the SLIM language specification document. What could be wrong? /home/compasseval/Documents/.../xxx.slim:29: (G-9) Port Connection is invalid, because it violates the rules for possible connection topologies. data port pumpGrn.pressure -> isol.hyd_in; -- hydraulics pumpGrn is instance of device pump isol.hyd is instance of device valve device pump features pressure: out data port bool default false; end pump; device implementation pump.impl end pump.impl; device valve features cmd: in data port bool; hyd_in: in data port bool; hyd_out: out data port bool; end valve; device implementation valve.impl flows hyd_out:= hyd_in and cmd; end valve.impl; *Regards* Chris Wilkinson
Dear Chris, In order to be able to define connections, the respective components need to be linked using a bus. I.e., both subcomponents have to access the same bus (so a bus subcomponent has to be added as well) using the "accesses" list. Subcomponents may also communicate if they are "running on" the same processor, or "stored in" the same memory. Best regards, Harold On 2015-11-11 19:01, Chris Wilkinson wrote:
This is one example of numerous similar errors that says my topology violates the rules.
I have port out->port in, consistent data types. This seems to accord with the restrictions and examples in section 4.3.2 Port Connections in the SLIM language specification document.
What could be wrong?
/home/compasseval/Documents/.../xxx.slim:29: (G-9) Port Connection is invalid, because it violates the rules for possible connection topologies. data port pumpGrn.pressure -> isol.hyd_in; -- hydraulics
pumpGrn is instance of device pump isol.hyd is instance of device valve
device pump features pressure: out data port bool default false; end pump; device implementation pump.impl end pump.impl;
device valve features cmd: in data port bool; hyd_in: in data port bool; hyd_out: out data port bool; end valve; device implementation valve.impl flows hyd_out:= hyd_in and cmd; end valve.impl;
_Regards_ Chris Wilkinson
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Harold, Why would it be necessary to use a bus to connect two components instead of a data port connection? Is that just a tool requirement or is there a logical reason for it? It does seem counter intuitive that such is necessary. The system I'm building is logically just a collection of gates with unidirectional signal flows so the notion of 'bus' is meaningless. Is there an example coding you could point to of a system of this type? Regards Chris Wilkinson On Nov 12, 2015 4:14 AM, "Harold Bruintjes" <h.bruintjes@cs.rwth-aachen.de> wrote:
Dear Chris,
In order to be able to define connections, the respective components need to be linked using a bus. I.e., both subcomponents have to access the same bus (so a bus subcomponent has to be added as well) using the "accesses" list. Subcomponents may also communicate if they are "running on" the same processor, or "stored in" the same memory.
Best regards,
Harold
On 2015-11-11 19:01, Chris Wilkinson wrote:
This is one example of numerous similar errors that says my topology violates the rules.
I have port out->port in, consistent data types. This seems to accord with the restrictions and examples in section 4.3.2 Port Connections in the SLIM language specification document.
What could be wrong?
/home/compasseval/Documents/.../xxx.slim:29: (G-9) Port Connection is invalid, because it violates the rules for possible connection topologies. data port pumpGrn.pressure -> isol.hyd_in; -- hydraulics
pumpGrn is instance of device pump isol.hyd is instance of device valve
device pump features pressure: out data port bool default false; end pump; device implementation pump.impl end pump.impl;
device valve features cmd: in data port bool; hyd_in: in data port bool; hyd_out: out data port bool; end valve; device implementation valve.impl flows hyd_out:= hyd_in and cmd; end valve.impl;
*Regards* Chris Wilkinson
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Dear Chris, This is simply a (syntactic) tool requirement. We are considering removing the restriction for the next release as there is (no longer) any need for it. A possible examples is the Adder-2.slim example, located in the 'tools/examples' directory of the distribution. It models an adder circuit with random bit inputs. Best regards, Harold On 2015-11-12 14:36, Chris Wilkinson wrote:
Harold,
Why would it be necessary to use a bus to connect two components instead of a data port connection? Is that just a tool requirement or is there a logical reason for it? It does seem counter intuitive that such is necessary.
The system I'm building is logically just a collection of gates with unidirectional signal flows so the notion of 'bus' is meaningless. Is there an example coding you could point to of a system of this type?
Regards Chris Wilkinson
On Nov 12, 2015 4:14 AM, "Harold Bruintjes" <h.bruintjes@cs.rwth-aachen.de <mailto:h.bruintjes@cs.rwth-aachen.de>> wrote:
Dear Chris,
In order to be able to define connections, the respective components need to be linked using a bus. I.e., both subcomponents have to access the same bus (so a bus subcomponent has to be added as well) using the "accesses" list. Subcomponents may also communicate if they are "running on" the same processor, or "stored in" the same memory.
Best regards,
Harold
On 2015-11-11 19:01, Chris Wilkinson wrote:
This is one example of numerous similar errors that says my topology violates the rules.
I have port out->port in, consistent data types. This seems to accord with the restrictions and examples in section 4.3.2 Port Connections in the SLIM language specification document.
What could be wrong?
/home/compasseval/Documents/.../xxx.slim:29: (G-9) Port Connection is invalid, because it violates the rules for possible connection topologies. data port pumpGrn.pressure -> isol.hyd_in; -- hydraulics
pumpGrn is instance of device pump isol.hyd is instance of device valve
device pump features pressure: out data port bool default false; end pump; device implementation pump.impl end pump.impl;
device valve features cmd: in data port bool; hyd_in: in data port bool; hyd_out: out data port bool; end valve; device implementation valve.impl flows hyd_out:= hyd_in and cmd; end valve.impl;
_Regards_ Chris Wilkinson
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Chris Wilkinson -
Harold Bruintjes